revision no. 1.1, date: 09-2005 page 1 of 2 copyright ? 2005 austriamicrosystems . trademarks registered ?. all rights reserved. the material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. to the best of its knowledge, austriamicrosystems asserts that the information contained in this publication is accurate and correct. 1. general description AS3931 is an ultra low power, three channel lf ask receiver designed to operate in various applications such as lf identification systems and lf tag receivers. AS3931 is able to detect a low frequency ask- modulated signal by looking for a digital wake-up pattern and generates a wake signal after successful pattern detection. the device incorporates an intelligent pattern detection algorithm that provides reliable operation even in presence of strong interferences. rssi signals can be generated at the rssi pin for each receiver channel. 2. key features - 3d wake-up pattern detection - 3d lf field strength measurement - antenna rotation for easy calibration - high sensitivity and high dynamic range - wide operating frequency range - reliable, interference resistant wake-up decoding - highly protected differential inputs - ultra low power consumption 3. main characteristics - wake-up sensitivity: 350 vpp - lf carrier frequency range: 19 ? 150 khz - data rate: 2.731 kb/s - current consumption in standby mode: 6.6 a - dynamic range: 60 db - rssi step: ( ? v rssi @ 1 mvpp input amp.): 290 mv 4. additional features - antenna rotation switch - three independent lf receiver chains - wake-up output combining the three receiver chains - low power 32.768 khz crystal oscillator circuit - serial programming interface - voltage regulator with 2.4 v output, on/off switchable each independent lf receiver chain contains: - input overload protection - input attenuator - ultra low power lf amplifier with logarithmic envelope output - robust data detector with adaptive slicing threshold that translates the logarithmic envelope into a digital data signal - error tolerant digital pattern correlator that detects a given code sequence in the received data signal and generates a wake-up signal - sophisticated power management logic that powers down the correlator if no data is received 5. applications - lf identification systems - lf tag receivers - three-dimensional lf field strength measurement systems - ultra low power wake-up systems 3d low power wake-up receiver AS3931 product brief
product brief AS3931 revision no. 1.1, date: 09-2005 page 2 of 2 copyright ? 2005 austriamicrosystems . trademarks registered ?. all rights reserved. the material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. to the best of its knowledge, austriamicrosystems asserts that the information contained in this publication is accurate and correct. block diagram AS3931 package, pin-out and marking 16 pin tssop package AS3931 xxxxxxxx 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 1 vcc 16 vreg 2 lf1n 15 rssi 3 lf1p 14 sda 4 lf2n 13 scl 5 lf2p 12 cs 6 lf3n 11 wake 7 lf3p 10 xout 8 gnd 9 xin xxxxxxxx = date code and plant id control logic multiplexer multiplexer detector 1 detector 2 detector 3 rssi multiplexer correlator 1 correlator 3 correlator 2 log. env. amp 1 log. env. amp 2 log. env. amp 3 input pro- tection 1 input pro- tection 2 input pro- tection 3 input att- enuator 1 input att- enuator 2 input att- enuator 3 antenna rotator data multiplexer rssi buffer regulator oscillator por rssi 1 rssi 2 rssi 3 data 2 data 1 data 3 wake 1 wake 2 wake 3 wake wak e rssi xin cs xout scl sda vreg gn d vcc lf1p lf1n lf2p lf2n lf3p lf3n wake generator
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